시스템반도체 개발지원센터

1. Review VIP / AVIP Role

2. Verification Environment Topology

3. Implementation METHOD

    -  Differences between PCIe VIP/AVP
    -   Creating the UVM Infrastructure that works for both VIP/AVIP
          1. Structuring the Test System
          2. Connecting the UVM Testbench to the DUT
          3. Building the UVM Environment
                    1) Passive Agents
                    2) Callbacks
                    3) Changing the test sequences
                              a. Configuration and Memory Transactions
                              b. Endpoint Enumeration
                              c. Sequence and Task Updates
                                   - Constrained Randomization of TLPs
                                   - AVIP Utility Tasks
                    4) Other Changes